CoCo Edge Buffer

Finally, a buffered Y-Cable.

Feb/14/2019:
Some text corrections.
Update: March 16, 2019
2020/06/26: New Cable added.

Starts with this PCB:
Note that X1 is un-buffered, and X3 is the Y-Cable side.


























Then that PCB gets slightly modified and includes an overlay PCB with a isplsi2032a CPLD which acts like an MPI PAL.

This cable has three IDC 40-pin card edge connectors installed.
One for the SDC, one for an IDE controller, and one spare.

This particular IDE controller is still in development stage.
Plus these PCB's fit the small empty game boxes.



























That buffered PCB with the hand-wired CPLD (upside-down) and plugs into X1 on the buffer PCB.
The cable does need to be "side swapped" as witnessed by the twisted pairs.
When the output pins are installed on the bottom of this PCB, then no cable pair swapping is needed, just plug the Y-cable into the bottom located pins.

This hand-wired PCB will be a real PCB, later on.
On the next PCB turn, the Y-40-pin connector will be fixed
 so that a special cable will not be needed.



























A better view, with a different set of blue edge fingers.
Don't use these as the solder pins are 0,2 inches apart! (top to bottom)























Here with two IDE controllers, running HD63C09E-NitrOS-9
Small LED at the end of the short red wire, is to signal a $FFD9 poke or fast speed CPU.
This top controller is set to $FF3X, while the controller underneath is set to $FF7X.
Notes on the CPLD mark the current development checksum.




























Oh, what, another LED???
An arbitrary color here, ie whatever is in the junk box.
Yes, this one shows the "fast" cpu mode.
Lit is 1.78MHz, off is 0.895MHz.
Still lots of CPLD room for more stuff.




















Update: March 16, 2019

The first daughter decoder PCB is in and it does have one mistake.
but it works as an MPI right away after a fix.
As this picture was being taken, NitrOS-9 6309 is running and
the command "MPI" results in a "MPI found" report.





















Side View
Showing the decoding PCB on top of the Y-Cable buffered PCB.
Together they both act like a mini-MPI. The read-back IC has the outputs corrected as shown.
There is a small hack area besides the 8-pin latch output header.
And a small LED to show when the coco3 cpu is in the FAST mode.
The jumper is to dis-allow $FF1X and $FF3X for coco's 1 and 2.
























New Cable added and tested:

Four Slots with no slot selection (maybe the next one).
Since these IDC slots are side-swapped, the front IDC connector comes from the bottom of the PCB,
  this un-swizzles the slot sides.
Pins 1 & 2 are NOT used (do not go back to the coco)
  and could be available for special connections.

There is room for two more slots, but I only purchased four.






























IdeZilla

Comments Welcomed


Comments

Post a Comment

Popular posts from this blog

DriveWire4_HD6309E

Image
DriveWire4 using an HD63C09EP cpu  on a Tandy Color Computer 3. Below is a text file sent to Discord today, modified again of course. Notes on how it got done. PTB/2020/05/26 I started with: Nitros9-6309L2-3.3.0-dw-30M.dsk (I forget which one that was used here). The files that were needed were obtained from BarryN's .dsk (Discord) I listed on paper with a pencil, the modules  that were missing but were inside of  NITROS9/6309L2/MODULES, rbf & scf. I added llide.dr and i0-ide.dd ( my already setup IDE-hdrive)  to have some permanent storage while I collected those  above modules to one location: /i0/DW6309  for ease of finding them while using kwikgen. At first i missed the module 'dwio' but made  sure that it got installed. All modules are loaded at boot and not added with LOAD. I will try and include the "MDIR" list.  First was a "mdir >/rd0/foo" (ramdisk)  Then "list /rd0/foo > /C1"  then finally found
Read more

8MB setup for a Tandy CoCo3

Image
Years ago the NoCan series of add-on PCB's was developed. Now today with more resources available to use, the NoCan-8MB is back. The first go-around is a prototype unit only. Updated: Aug/30/2018 Here is a single picture of the current setup. Since the PCB layout limits the size of any PCB, it's in two pieces currently. A memory PCB (left PCB) and a DAT PCB. It started with the 2MB setup and received some hand-added wires to use up the rest of that 16 x 4 SRAM (74LS189). The 8-wire cable at the bottom of the DAT PCB (right PCB) is the JTAG connection. It was tested with Robert Gault's memory test software, originally designed strictly for the NoCan-8MB boards. Thanks Robert! I used the same memory PCB and stuffed another DAT PCB to test an 8MB CPLD. How to use the extra 6MB in a NoCan-8MB device. The following initializes a ramdisk already named "/r0" (/rzero),  and fills it with the contents of /DD/CMDS. <enter> Means
Read more

Posting Feb 22 2018

Image
OK, with a great sigh I have been gifted several items by Ron DelVaux, Thanks Ron as you are extremely generous. The name "IdeZilla" comes from the single chip 16-bit IDE controller using a 2064 Lattice CPLD. That has everything inside of it including the upper 8-bits of the data path along with jumper-ed decoding. This seems to be one of the links to my old CoCoZilla websites, three of them. Apparently someone seemed it necessary to save all of that stuff, THANKS! http://www.geocities.ws/idezilla/ OK, I just tried this link then went to the first CoCoZilla link. I was redirected to something not good. So, try this link for #1. http://www.geocities.ws/idezilla/CoCoZilla1/frontpage.html Loot: CoCo2 sealed, CoCo3 opened, two joys, one mouse, floppy controller, Y-box. I need to find some cables to set it up. I will need help in connecting either CoCo to an NEC VGA LCD monitor. In foil are two 512 boards of which none work. I fix both and get to keep one
Read more